As is well known, in general, in a semiconductor chip package, a semiconductor die is mounted on a flag portion of a leadframe, and wires or connecting bridges electrically connect the die to inner ends of lead portions of the leadframe, the die, wires and the inner ends of the lead portions being encapsulated in plastic moulding compound to form the semiconductor chip package.
In high power plastic semiconductor chip packages, the bottom surface of the flag portion provides a heat sink for the semiconductor die; so it is not encapsulated in the moulding compound. Hence, encapsulation of the die, the wire bonds and the inner portions of the lead portions, without covering the bottom surface of the flag portion of the leadframe and without causing package integrity and delamination issues is critical. Package integrity and delamination are major concerns in electronic component packaging design. Moisture and/or ionic contamination from the atmosphere can sometimes penetrate through the junction of the plastic compound and the flag portion of the leadframe, which can cause reliability problems, i.e. a greatly reduced component operating life.
During the manufacturing process or under certain operating conditions, separation of the mold compound and the leadframe, or metal substrate carrier, on which the semiconductor device is mounted, may occur in some of the packages which have poor integrity, that is low adhesion between the mold compound and the substrate. Consequently, a gap may exist between the mold compound encapsulation and the leadframe. Moisture can then travel along the gap to the functional area of the electronic device. In the worst case, the plastic encapsulation might totally detach from the leadframe, leaving the electronic device completely exposed. This phenomenon is becoming more and more critical as the semiconductor industry moves towards packaging electronic devices in smaller and smaller packages.
Accordingly, a lot of effort has gone into trying to minimize the effect of or prolong the time for moisture diffusion to the area where the semiconductor die is mounted. In order to try to achieve this, additional features have been added to the leadframe substrate to try to provide both a barrier to moisture penetration and to enhance the "locking" between the mold compound and the substrate.
As shown in FIGS. 1 and 2, a known power plastic package is formed from a leadframe including a large flag portion 2, on which is mounted a semiconductor die 3. The semiconductor die 3 is electrically connected to inner ends 4 of the lead portions 8 using gold, copper or aluminium wires 5. The complete assembly is then encapsulated in an epoxy compound 1, except for the lower surface of the flag portion 2, which is left uncovered to provide a heat sink to dissipate heat from the die 3 to the external environment. Since the epoxy compound 1 does not cover the exposed heatsink, it cannot firmly lock to the leadframe.
As shown in FIG. 2, the lead portions 8 are bent downwards to facilitate soldering of the package to a printed circuit board. Thus, the inner ends 4 protrude towards the flag portion at a different level from the flag portion, thus allowing the epoxy compound to completely encapsulate the inner end 4 so as to improve the locking.
However, bending the leads requires a forming tool which must be designed and manufactured to form and stamp to the required precise leadframe downset dimension. This requires a considerable period of time (usually around 10-12 weeks), which delays introducing any changes into the leadframe design. An alternative is to use plastic or paper for rapid prototyping. However, this method does not provide functional parts that are capable of being used in early reliability testing of samples for customers.